Development of a low-noise analog front-end ASIC for APD-PET detectors

Presentation on theme: "Development of a low-noise analog front-end ASIC for APD-PET detectors"— Presentation transcript:

1 Development of a low-noise analog front-end ASIC for APD-PET detectors
of Glasgow 256 ch APD-array 8 ch Analog ASIC Thank you very much. My name is Makoto Koizumi and I’m from Tokyo, Japan. It’s an honor to have the opportunity of addressing such a distinguished audience today. You may find my accent a little difficult to understand, so please bear with me. I will talk about Development of a low-noise analog front-end ASIC for APD-PET detectors. Makoto Koizumi (Tokyo Tech) J.Kataoka, S.Tanaka, H.Ishibashi, N.Kawai (Tokyo Tech) H.Ikeda (JAXA) Y.Ishikawa, N.Kawabata, Y.Matsunaga, K.Shimizu (Hamamatsu Photonics) H.Kubo (Kyoto University)

2 Development and evaluation of 8-channel ASIC (ver.1)
Outline Development and evaluation of 8-channel ASIC (ver.1) Introduction Circuit Architecture Ver.1 8ch Performance Future prospects 32-channel ASIC (ver.2) Here you can see an outline of my presentation. First, I will report on the development and evaluation of eight-channel ASIC manufactured as 1st version. Such includes introduction, circuit architecture, experimental setup, and performances. Next, I will talk about future prospects, about current status of thirty-two-channel version 2 ASIC , and our concept of compact mobile PET unit. Mobile PET unit Conclusion Ver.2 32ch 2

3 Introduction 3 We are now developing high spatial resolution, low-cost and multipurpose next generation PET detectors by using APD-arrays. (1) sensor head (pixel scinti.) ~80 mm (2) APD-array 30 mm 30 mm (3)Analog front-end electronics with ASIC Introduction. We are now developing high spatial resolution, los-cost and multipurpose next-generation PET detectors by using APD-arrays. This figure shows the our concept of compact mobile PET unit. It is expected to apply for MRI/PET and TOF-PET, however, the high-density electronics are newly required. In this particular session, I will talk about the development of analog front-end ASIC. Flexible, low-cost mobile PET w/ sub-mm resol. Application to MRI/PET and TOF-PET. Woody et al. (2003)

4 Introduction 4 Requirements for APD-PET front-end electronics
・Simultaneous processing of multiple channels ( > 8-channel) ・CSA gain optimized to APD (～50 times) ・Fast Shaping time optimized to decay time of LYSO (～40ns) ・Time-of-Flight capability (< 1 ns) ・High energy resolution ・Low-noise and low-power consumption In that regard, requirements for APD-PET front-end electronics are shown below. Simultaneous processing of multiple channels, for example, upper eight-channels, because of higher number of pixels of APD-arrays. CSA gain optimized to APD gain, it’s about fifty-times. Shaping time constant optimized to fast decay time of LYSO scintillators, about forty nano seconds. and, etc. Under these specifications, we have developed an analog front-end ASIC in cooperation with JAXA. We have developed an analog front-end ASIC which meets these specifications in cooperation with JAXA. 4

5 Circuit Architecture 5 APD- array CHAIN1 CHAIN2 Position Information
(LVDS out) Parallel to Serial ch7 APD- array ・・・ DATA VALID ch0 PREAMP SLOW CSA Shaper (t～100ns) Energy Discriminator FAST Differentiator (t～50ns) Zero-crossing Discriminator CHAIN1 This figure shows the circuit architecture. Two different kind of systems coexist on the ASIC. Eight-channel CHAIN1 consists of a charge-sensitive amplifier, 2nd-order Shaper which has shaping time constant of about one hundred nano second , differentiating circuit, energy discriminator, and timing discriminator. One-channel CHAIN2 consists of a biasing circuit, analog summing circuit which has smaller shaping time constant of two hundred nano second, and two channels of time-to-amplitude converters. To a certain valid event, CHAIN1 provides position information via a parallel to serial converter, and CHAIN2 provides energy and hit timing information. Analog Sum (t～200ns) BIAS TAC1 TAC2 CHAIN2 Energy Information (Analog out) Timing Information (Analog out) 5

6 Zero-crossing method It is very important to obtain true hit timing information with various events for Time-of-Flight based PET Apply the most simple zero-crossing method Zero-crossing method Shaper output 1. SLOW reaches to signal peak 2. Its differential signal FAST crosses zero point 3. Zero-crossing comparator turns on to start TACs SLOW 200ns It is very important to obtain true hit timing information with various events for time-of-flight based PET. Therefore, we applied the most simple zero-crossing method to obtain start signal of two TACs. SLOW represents shaper output signal, and FAST represents differentiating signal of SLOW. As you know, when the SLOW reaches to signal peak, its differential signal FAST crosses the zero point. As long as SLOW is similar to its amplitude, we can always obtain constant timing signal to start TACs. This figure shows the simulation results. The walk, variation of zero-cross point was within six-hundred pico second, with five-hundred eleven keV plus minus ten percent. FAST Time walk within 600 ps was expected with 511keV±13% Peak detection 100ns Differentiator output 6

7 2007/5/29 : Completed 7 ・Process：TSMC 0.35μm CMOS ・Chip size：3mm×3mm
80-pin Ceramic Package 3 mm Testing board 3 mm ・Process：TSMC 0.35μm CMOS The ASIC was completed last year. The fabrication process was TSMC zero point three five micron CMOS process. The chip size is three by three millimeters. It was encapsulated in eighty-pins ceramic quad flat package, shown in the upper right. Total power consumption was measured by using testing board, shown in the lower right, And the value was fifty-five milliwatt in total, and six point nine milliwatt per channel. ・Chip size：3mm×3mm ・Package：80pin Ceramic QFP ・Number of channels：8ch ・Power consumption:55mW (6.9mW/ch) 7

8 Experimental results : Waveforms
8 Simulation Experimental FAST FAST PREAMP PREAMP SLOW SLOW ASUM ASUM These are the observed waveforms compared to simulation results. Green PREAMP shows output signal of CSA, blue SLOW shows shaper output, purple FAST shows the differential of SLOW, And light blue ASUM shows analog summing output. Since FAST indicates differentiation relative to SLOW, the zero-cross point of FAST corresponds to the peak of SLOW. Experimental waveforms were consistent with simulation results, And moreover, gain dispersion and offset voltages were within adjustable ranges. ・Experimental waveforms were consistent with simulation results. ・Gain dispersion and offset voltages were within adjustable ranges.

9 Experimental results : Noise performance
ENC ： below 1000 e- for 2mm□ S/N : 100 times ensured 2mm□ 13.6pF 1mm□ 3.4pF simulation Excess exists Noise performance was measured by spectrum of test pulses. In this figure, horizontal axis shows input capacitance and vertical axis shows equivalent noise charge. The red line is simulation result, and the blue line is experimental result. Measured ENC is about six hundred electrons at zero-pico farad, But it was obviously exceeded the simulation result of about four hundred electrons. This excess was caused by the floating capacitance of a relatively large package. However, in practice, capacitance of our APD-arrays are three point four pico farad at one millimeter square array, And thirteen point six pico farad at two millimeter square array. It was secured one hundred times of signal to noise ratio, sufficiently. ・Equivalent Noise Charge (ENC)： 600 e e- / pF (RMS) ・Certain excess exists between experimental and simulation results. 　⇒It might be the floating capacitance of a relatively large package. 9

10 Experimental results : Energy resolution
370V operation （22Na） ＋ ＋ LYSO 2mm□ APD 2mm□ TIPPET08 No.30_ch2 The energy resolution of the analog front-end was measured using a natrium source and two by two by ten cubic millimeter LYSO single pixel scintillator, coupled to two by two square millimeter APD single pixel. The operation voltage was three hundred seventy volt. This figure shows the energy spectrum of the source. The energy resolution of nine point seven percent was obtained at five hundred eleven keV photopeak. It was sufficient performance for PET device. ・Resolution：9.7 % （FWHM） ＠511keV 　⇒Sufficient performance for APD-PET 10

11 Experimental results : Time resolution
The electric time resolution of the analog front-end was measured by using a test pulser and an external TAC module. Timing resolution of nine hundred seventy pico second RMS was obtained. It was achieved by simple zero-crossing method. Time Resolution：970 psec ⇒achieved by simple zero-cross method. 11

12 Low Temperature Co-fired
2nd version ASIC “TIPPET32” 12 Main differences 8 mm Number of channels : 8 ch → 32 ch Order of the shaper : 2 nd → 3 rd Time resolution : ps → 570 ps Package : QFP → LTCC Polo-Zero-Cancellation (PZC) Priority chain encoder 3 mm Low Temperature Co-fired Ceramics package LTCC QFP 13mm We are now developing and evaluating second-version ASIC named TIPPET thirty two. The main differences between first version and second version are shown. Number of channels are multiplied to thirty-two channel. Look at the upper right figure. It is the layout of TIPPET thirty-two. The size was extended to three by eight millimeter. Red rectangle represents one channel of the analog processing circuit. The order of the shaper is changed second to third. It provides higher gradient of zero-cross point, so the time resolution was largely improved to five hundred seventy pico second. And, It is encapsulated in special LTCC package. LTCC means Low Temperature Co-fired Ceramics package, it has the advantages of low-noise, small-size, and high heat rejection. Look at the lower left photograph. The size is obviously compact compared with experimental use QFP package. And, on the lower right photograph, comparison with QFP and LTCC and simulation results are shown. By the grace of LTCC, we got very low-noise results close to the simulation data.

13 Mobile APD-PET unit 13 All front-end processing are coverd
8cm 3cm All front-end processing are coverd ⇒It can be connected flexibly !! LYSO-array APD-array Front-end Card （FEC) ×4 This figure shows the concept of mobile APD-PET unit. It consists of sixteen by sixteen LYSO scintillator array, one-to-one related APD array, Four Front-end-Card which includes two of the ASIC, And one Control Card which includes a FPGA which condition the position and timing data, and send them to coincidence circuit. It covers two hundred fifty six channels and all front-end processing, so it can be connected any size flexibly. And very easy to maintenance. Control Card （CC) ×1 13

14 Summary 14 We plan to evaluate spatial resolution with one-pair unit
Our goal is to realize a high-resolution, low-cost and multipurpose next-generation PET detectors. TIPPET08 (1st version) ・We manufactured 8-channel analog ASIC optimized to APD ・Good energy resolution of 511 keV with APD ・Good time resolution of 970 ・Low-noise of 600 e e- / pF with low-power of 6.9 mW/ch. TIPPET32 (2nd version) ・We are now developing and evaluating 32-channel 2nd version ASIC Summary. Our goal is to realize a high-resolution, low-cost and multipurpose next-generation PET detectors. First of all, we manufactured eight-channel analog ASIC optimized to APD. We obtained good energy resolution and good time resolution with low-noise, low-power consumption. And now, we are developing and evaluating thirty-two channel second-version ASIC. We obtained good time resolution of five hundred seventy pico second with lower noise, lower power consumption. Based on these results, we plan to get the images using phantom or mouse, And evaluate actual spatial resolution with one-pair detector unit. ・Good time resolution of 570 ・Low-noise of 560 e e- / pF with low-power of 6.0 mW/ch. We plan to evaluate spatial resolution with one-pair unit

15 Thank you ! Thank you !

16 BACKUP

17 2nd version ASIC “TIPPET32”
NOISE FAST σj Jitter Vth FAST(+10%) Walk σw Fluctuation of zero-cross point （511keV±10%） Vth FAST(-10%) 8ch (ver.1) → multiplied to 32 ch (ver.2) We are now developing and evaluating second-version ASIC named TIPPET thirty two. The main differences between first version and second version are Number of channels are multiplied to thirty-two channel. The order of the shaper is changed to third to improve time resolution with bigger gradient of zero-cross. And, It is encapsulated in special LTCC package for low-noise, small-size, and high heat rejection. Largely improved time resolution Dt jitter ~ 970 ps → ~ 580 ps (ver.2) Dt walk ~ 600 ps → ~ 60 ps (ver.2) Low Temperature Co-fired Ceramics (LTCC) Package is specially used. LTCC package（KOA)

18 Time walk Simulation Experimental 600 ps (511 keV ±12.5%) 870 ps (511 keV ±12.5%)

19 NORMAL DOUBLE STOP Time Voltage START STOP2 STOP1 Voltage Time Voltage
TAC2_C1 START STOP2 TAC2_C2 Detector1 Detector2 TAC1_C1 STOP1 TAC1_C2 ΔV2 STOP信号を2回入力⇒2つのTACの電位差を常に測定 ・STOP信号の入力時間間隔は一定 　⇒常にTACの傾きを測定 　⇒チップ毎にリアルタイム補正が可能 ・TAC1の線形性が悪い領域ではTAC2の電圧を参照⇒不感時間回避が可能 Detector1 Voltage TAC_C1 Time Voltage Detector2 TAC_C2 Time START STOP TAC_C1の傾きで校正⇒正しいSTART時間とズレる ・検出器１と２でTACの傾きが異なる 　⇒START時間を知るには事前に全ての 　　チップの傾きを調べて校正の必要有 ・温度や電源電圧の変化でTACの傾き （電流オフセット）が変化すると対応不可能

20 TOFについて Time-of-Flight型PETは、 感度を大幅に向上させる 最先端の研究テーマ 放医研 村山グループ
　 最先端の研究テーマ 放医研 村山グループ 　（澁谷さんほか）による　　 　 simulation 400 psec (~12cm相当) 　 の TOF 情報があるだけで 　 PET 画像は格段にクリア 2006年にPHILIPSが実用化 　LYSOシンチレータ＋PMTで 　時間分解能～650 ps

21 ガンマ線飛行時間測定の原理 問題点 検出器への 到達時間差 飛行時間情報 （TOF情報） ダブルストップ方式の採用 検出器1 癌細胞
HIT1 時間 電圧 TAC回路：START入力からSTOP入力 までの経過時間に比例した電圧を出力 TAC_C1 HIT1 START TAC_C1 TAC_C2 STOP 検出器1 検出器への 到達時間差 飛行時間情報 （TOF情報） HIT2 癌細胞 TAC_C2 HIT2 START この図ではTAC1と2が全く同じ傾きを持っていることが前提 ⇒多数のLSIでは調整困難 問題点 Common STOP 検出器2 TACを2系統用いた ダブルストップ方式の採用 （池田博一教授発明の線形補間方式）

22 APD-PET用LSIver.2：PETシステム全体図
Extended Mobile PET Unit Front End Card×4 Control Card LSI_C0 32ch ADC AD9287 APD-array 256ch FPGA Cyclone Ⅲ EP3C25 LSI_C1 32ch DAC AD5360 ・FEC1枚あたり2chipを搭載し、64 ch分を担当 ・CCのFPGAでFEC4枚分、APD 256 ch分を一括処理し、 　同時計数回路への橋渡しを行う Coincidence Circuit

23 PET = Positron Emission Tomography
⇒陽電子放出核種を用いた最新のがん検査法 がん細胞は ブドウ糖が大好物 陽電子 体内電子 がん細胞 検出器 511keV 対消滅g線をキャッチ LOR:Line of Response がんの位置情報 がん細胞 511 keV 対消滅γ線 被験者 LOR2 LOR1 がん細胞 正常細胞 ブドウ糖 ブドウ糖と陽電子放出 核種を合成して注射 FDG:フルオロデオキシグルコース PETの利点 ・コリメータが不要 ⇒ 低被爆量 ・癌の活動性/悪性度⇒ 機能画像 ・全身を一度に検査 ⇒ 早期発見 積極的に使いたい！ しかし・・・

24 10 アナログ信号処理の流れ 整形回路 LOW HI VALID判定 SLOW 200ns 40ns 10ms APD APD プリアンプ
ラッチ回路 CHAIN1 VALID AND コンパレータ(LOW) ラッチ回路 SLOW アドレス情報 APD 電荷増幅回路 整形回路 トリガ生成回路 PREAMP 微分回路 ゼロクロスコンパレータ FAST HIT アナログ信号処理の流れ 整形回路 LOW HI VALID判定 LOW<信号<HI ⇒VALID 550keV SLOW 450keV 200ns 40ns 10ms 判定スタート APD APD プリアンプ ピーク検出 FAST 100ns アドレス情報 微分回路

25 10 信号処理の流れ(CHAIN2) HIT ASUM DSUM 電圧 各プリアンプ出力 ASUM 常に一定 ch.1 ch.2 ch.3
電荷増幅回路 ゼロクロスコンパレータ ラッチ回路 HIT バイアス電圧 生成回路 アナログ加算回路 ASUM DSUM 時間電圧変換回路1 CHAIN2 時間電圧変換回路2 信号波形 TAC1 TAC2 STOP1 STOP2 信号処理の流れ(CHAIN2) 電圧 TAC2 各プリアンプ出力 ASUM 常に一定 ch.1 ch.2 TAC1 ch.3 時間 400ns HIT STOP2 ・・・ 10ms STOP1 アナログ加算回路 時間電圧変換回路

26 ・多チャンネル化による信号数の増加⇒大規模な処理回路が必要 ・新しい検出器であるAPDに対応したLSI⇒ほとんど存在しない
APD-PET専用LSIの開発が必要 LSI開発スケジュール（ver.1） 設計開始（2006/10月） 3ヶ月 ・Open-IPを利用 ・回路シミュレーション レイアウト開始 2ヶ月 ・シリコン基板上に 　回路をレイアウト 製造開始（TSMC社） 3ヶ月 ・ベアチップをパッケージ ・ボンディングの確認 納品（2007/5月末） トータル8ヶ月で初版完成！

27 次世代光検出器： 浜松ホトニクス APD 信号増幅する（G~50-100）フォトダイオード コンパクト、低消費電力、磁場に強い
nm の波長域で量子効率 ＞ 80% 速い時間応答 (サブ・ナノ秒) PMT+PD の特長を備える 　Kishimoto et al. 2003 Time [nsec] 光 n+ n- n p p+ － ＋ e 電場 増幅領域 位置 100 LYSO 量子効率[%] APD CsI 50 20 PMT 300 600 900 1200 波長[nm]

28 APDの時間特性 (TOFに向けて) Kishimoto et al. 08 使用APD S8664-30N (リバース型)
高エ研放射光 (PF-ARリング)・シングルバンチでの測定 (BL-14A 岸本先生のご厚意) APD単体としての時間応答は　ΔT = 102 ps

29 PETの限界 陽電子 体内電子 がん細胞 検出器 ガンマ線の角度揺動 検出器のサイズ 体内における陽電子の飛程

30 APD-PET用LSIver.2：PETモードでの信号の流れ
FPGAの役割 ・1ユニット、8チップの統括 ・時間情報とアドレス情報を浜松 　式のフォーマットに整形 ・チップIDの割り振り ・LSIのch毎の校正（JTAG使用） ・TACのSTOP信号、RESET信号 　の生成 ・ADC及びDACのオペレーション 時間情報 時間情報 FADC 8bit FADC 8bit TAC2 8bit TAC１ 8bit TAC1 TAC2 256ch APD-array アドレス情報 LSI_C0 32ch SDAV DSUMOUT 時間関係 アドレス関係 STOP1 READ STOP2 RCK RESET FPGA アドレス情報 LSI_C1 時間情報 ChipID 8bit+ HITadd. 8bit TAC１ 8bit+ TAC2 8bit Minor Clock Major Clock LSI_C2 Coincidence Circuit … LSI_C7

31 Frame 1 Frame 2 Coincidence Detector Input Format TAC1_out （8 bit）
Valid Flag Minor Clock Counts（4 or 5 bit） TAC1_out （8 bit） HIT Address （8 bit） Frame No. Frame 2 Valid Flag Minor Clock Counts（4 or 5 bit） TAC2_out （8 bit） HIT Address （8 bit） Frame No.

32 1 1 TAC1-out TAC1-out Detector-1 Detector-2 Detector-1 Detector-2 1 1
Coincidence Detector Output (IJ-data) Format Frame 1 1 1 TAC1-out TAC1-out X Y X Y Hit order Detector-1 Detector-2 Detector-1 Detector-2 Frame Number 1 Frame 2 1 1 TAC2-out TAC2-out X Y X Y Hit order Detector-1 Detector-2 Detector-1 Detector-2 Frame Number 2